Area-Array of 3-Arc-Fan Compliant Interconnects as Effective Drop-Impact Isolator for Microsystems

Chen, W. and Sitaraman, S. K., “Area-Array of 3-Arc-Fan Compliant Interconnects as Effective Drop-Impact Isolator for Microsystems,” IEEE Journal of Microelectromechanical Systems, Vol. 25, No. 2, April 2016, pp. 337-346.
Compliant off-chip interconnects as the first-level and second-level compliant interconnect structures are able to accommodate the differential displacement between the die and the substrate or between the substrate and the board due to their high in-plane and out-of-plane compliance. This paper presents experimental and simulation results of drop testing of silicon substrates with micro-scale copper compliant interconnects assembled on organic boards. The micro-scale copper compliant interconnects in this paper are three-arc-fan compliant interconnects with arcuate beam width equal to 10, 15, and 20 μm, respectively. The samples with three-arc-fan compliant interconnects were subjected to drop tests at varying drop heights ranging from 20 to 50 cm in steps of 10 cm. The experimental and simulation results were compared against the corresponding results obtained from the samples assembled with the solder ball interconnects. Through drop-test experiments and simulations, it is shown that the three-arc-fan compliant interconnects when scaled down in size and fabricated through copper electroplating process are able to isolate the strain transferred from an organic board to a silicon substrate, and that the impact isolation increases with the increased compliance of the interconnects.
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