Full-Chip Through-Silicon-Via Interfacial Crack Analysis and Optimization for 3D IC
Submitted by Caspar_admin on Fri, 01/03/2014 - 20:29Citation:
Jung, M., Liu, X., Sitaraman, S. K., Pan, D. Z., and Lim, S. K., “Full-Chip Through-Silicon-Via Interfacial Crack Analysis and Optimization for 3D IC,” International Conference on Computer-Aided Design, Nov. 2011