ECTC/Other
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Tian, Y., Liu, X., Chow, J., Wu, Y. P., and Sitaraman, S. K., “Comparison of IMC Growth in Flip-Chip Assemblies with 100- and 200-µm-Pitch SAC305 Solder Joints,” 63rd Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, May 2013, pp. 1005-1009.
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Chen, W., Bhat, A., and Sitaraman, S. K., “Use of Compliant Interconnects for Drop Impact Isolation,” 63rd Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, May 2013, pp. 835-839.
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Okereke, R. and Sitaraman, S. K., “Three-Path Electroplated Copper Compliant Interconnects: Fabrication and Modeling Studies,” 63rd Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, May 2013, pp. 129-135.
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Xu, J., Razeeb, K. M., Sitaraman, S. K., and Mathewson, A., “The Fabrication of Ultra Long Metal Nanowire Bumps and their Application as Interconnects,” 12th IEEE International Conference on Nanotechnology (IEEE-NANO), Birmingham, UK, August 2012.
- Taylor, C. and Sitaraman S.K.,"In-situ strain measurement with metallic thin film sensors," 62nd Electronic Components and Technology Conference, p. 641-646,2012
- Liu, X., Li, M., Mullen, D., Cline, J., and Sitaraman, S.K.,"Design and assembly of double-sided 3D package with a controller and a DRAM stack," 62nd Electronic Components and Technology Conference,1205-1212,2012
- Raghavan, S., Schmadlak, I., and Sitaraman, S.K., "Interlayer dielectric cracking in back end of line (BEOL) stack," 62nd Electronic Components and Technology Conference, p.1467-1474,2012
- Lee, R.E., Okereke, R., and Sitaraman, S.K., "Multi-path fan shaped compliant off-chip interconnects," 61st Electronic Components and Technology Conference, p 2141-2145, 2011
- Liu, X., Chen, Q., Sundaram,V. Simmons-Matthews, M., Wachltier, K.P., Tummala, R.R., and Sitaraman, S.K., "Thermo-mechanical behavior of through silicon vias in a 3D integrated package with inter-chip microbumps," 61st Electronic Components and Technology Conference, p 1190-1195, 2011
- Liu, X., Chen, Q., Dixit, P., Chatterjee, R., Tummala, R. R., and Sitaraman, S. K., "Failure mechanisms and optimum design for electroplated copper Through-Silicon Vias (TSV)," 59th Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, May 2009, pp. 624-629.
- Zheng, G., Ostrowicki, G., and Sitaraman, S.K., "Non Contact Magnetic Actuation Test Technique to Characterize Interfactial Fatigue Fracture of Thin Films," Proceedings - Electronic Components and Technology Conference , p 1368-1373, 2009, 2009 Proceedings 59th Electronic Components and Technology Conference, ECTC.
- Xi Liu, Qiao Chen, Dixit, P., Chatterjee, R., Rao, R T., and Sitaraman, S.K., "Failure Mechanism and Optimum Design for Electroplated Copper Through Silicon Vias (TSV)," Proceedings - Electronic Components and Technology Conference, p 624-629, 2009, 2009 Proceedings 59th Electronic Components and Technology Conference, ECTC.
- Perkins, Andy and Sitaraman, S.K., "A study into the sequencing of thermal cycling and vibration tests," Proceedings - Electronic Components and Technology Conference , p 584-592, 2008, 2008 Proceedings 58th Electronic Components and Technology Conference, ECTC.
- McCaslin, Luke and Sitaraman S.K., "Methodology for modeling substrate warpage using copper trace pattern implementation," Proceedings - Electronic Components and Technology Conference , p 1582-1586, 2008, 2008 Proceedings 58th Electronic Components and Technology Conference, ECTC.
- Zheng, J., Modi, M., Ginga, N., and Sitaraman, S., "Silicon, Low-K Dielectric, and Nano-Scale Metal Interface Characterization using Stress-Engineered Superlayer Test Methods," 57th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Reno, NV, May 2007, pp. 1384-1389.
- Kacker, K., Sokol, T., and Sitaraman, S. K., "FlexConnects: A Cost-Effective Implementation of Compliant Chip-to-Substrate Interconnects," 57th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Reno, NV, May 2007, pp. 1678-1684.
- Kim, I., Pucha, R. V., Peak, R. S., and Sitaraman, S. K., "System-Design-for-Reliability Tools for Highly Integrated Electronic Packaging Systems," 57th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Reno, NV, May 2007, pp. 1809-1814.
- Kumbhat, N., Raj, P. M., Pucha, R. V., Sundaram, V., Bongio, E., Sitaraman, S., and Tummala, R. R., "A Novel Low CTE, High Stiffness Ceramic Composite Core," Circuits Assembly, January 2007, p. 28.
- Zheng, J. and Sitaraman, S. K., "Fixtureless Superlayer-Driven Decohesion Test for Interfacial Fracture Toughness Measurement of Nano-Scale Thin Films," Thin Films and Intefaces-4, International Conference on Advanced Materials Design and Development, Goa, India, Dec. 2005.
- Lee, K.J., Pucha, R., Varadarajan, M., Bhattacharya, S., Tummala, R., and Sitaraman, S.K., "Reliability Assessment of Embedded Capacitors in Multilayered Microvia Organic Substrate," IMAPS 2005, Philadelphia, PA, Sep. 2005.
- Perkins, A. and Sitaraman, S. K., "Acceleration Factor to Relate Thermal Cycles to Power Cycles for Ceramic Area Array Packages," 2005 Surface Mount Technology Association International (SMTAI) Conference Proceedings, Chicago, Sep. 2005.
- Kacker, K., Lo, G., and Sitaraman, S. K., "Assembly and Reliability Assessment of Lithography-Based Wafer-Level Compliant Chip-to-Substrate Interconnects," 55th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Orlando, FL, May 2005, pp. 545-550.
- Klein, K.M., Zheng, J., Gewirtz, A., Sarma, D. S. R., Rajalakshmi, S., and Sitaraman, S.K., "Array of Nano-Cantilevers as a Bio-Assay for Cancer Diagnosis," ," 55th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Orlando, FL, May 2005, pp. 583-587.
- Kumbhat, N., Raj, P. M., Pucha, R. V., Atmur, S., Doraiswamy, R., Sundaram, V., Bhattacharya, S., Sitaraman, S.K., and Tummala, R. "Recent Advances in Composite Substrate Materials for High-Density and High-Reliability Packaging Applications," ," 55th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Orlando, FL, May 2005, pp. 1364-1372.
- Zheng, J., Klein, K.M., Pucha, R., Sitaraman, S.V . , Merlin, D., Rajalakshmi, S., Sarma, D. S. R., Gewirtz, A. and Sitaraman, S.K., "Nano-Cantilevers for an Ultra-Sensitive Bio-Assay," Proceedings of NSTI Nanotechnology Conf. and Trade Show, Vol. 1 Chapter 8: Bio Micro Sensors, May 2005, pp. 406-409.
- Lee, K.J., Bhattacharya, S., Varadarajan, M., Wan, L., Abothu, I.R., Sundaram, V., Muthana, P., Balaraman, D., Raj, P.M., Swaminathan, M., Sitaraman, S.K. and Tummala, R.R., "Design, Fabrication, and Reliability Assessment of Embedded Resistors and Capacitors on Multilayered Microvia Organic Substrates," Proceedings of the IEEE-CPMT International Symposium and Exhibition on Advanced Packaging Materials, Irvine, CA, pp. 249-254, March 16-18, 2005.
- Damani, M., Pucha, R.V., Bhattacharya, S., Tummala, R., and Sitaraman, S.K., "Physics-based Reliability Assessment of Embedded Passives," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 2027-2031
- Kumbhat, N., Raj, P.M., Pucha, R.V., Sundaram, V., Doraiswami, R., Bhattacharya, S., Hayes, S., Atmur, S., Sitaraman, S.K., and Tummala, R., "Next Generation of Package/Board Materials Technology for Ultra-High Density Wiring and Fine-Pitch Reliable Interconnection Assembly," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 1843-1850
- Mahalingam, S., Hegde, S., Ahmad, J., Pucha, R.V., Sundaram, V., Liu, F., White, G., Tummala, R., and Sitaraman, S.K., "Materials, Processes and Reliability of Mixed-Signal Substrates for SOP Technology," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 1630-1635
- Tunga, K., Kacker, K., Pucha, R.V., and Sitaraman, S.K., "Accelerated Thermal Cycling: Is it Different for Lead-free Solder?," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 1579-1585
- Kim, W., Madhavan, R., Mao, J., Choi, J., Choi, S., Ravi, D., Sundaram, V., Sankararaman, S. , Gupta, P., Zhang, Z., Lo, G., Swaminathan, M., Tummala, R., Sitaraman, S.K., Wong, C.P., Lyer, G., Rotaru, G., and Tay, A., "Effect of Wafer Level Packaging, Silicon Substrate and Board Material on Gigabit Board-Silicon-Board Data Transmission," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 1506-1512
- Perkins, A., and Sitaraman, S.K., "Vibration-Induced Solder Joint Failure of a Ceramic Column Grid Array (CCGA) Package," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 1271-1278
- Hegde, S., Pucha, R.V., Guidotti, D., Liu, F., Chang, Y.J., Tummala, R., Chang, G. and Sitaraman, S. K., "Design, Fabrication, and Reliability Testing of Embedded Optical Interconnects on Package," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 895-900
- Zhang, Z., Fan, L., Sitaraman, S. K., and Wong, C.P. "Four-Laser Bending Beam Measurements and FEM Modeling of Underfill Induced Wafer Warpage,"54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 747-753
- Lo, G. and Sitaraman, S. K., "G-Helix: Lithography-Based Wafer-Level Compliant Chip-to-Substrate Interconnects," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 320-325
- Zheng, J. and Sitaraman, S. K., "In-Process Measurement of the Interfacial Fracture Toughness for a Sub-micron Titanium Thin Film and Silicon Interface using a Single-Strip Decohesion Test," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 134-139.
- N. Kumbhat, P. Markondeya Raj, S. Hegde, R.V. Pucha, V. Sundaram, S. Hayes, S. Atmur, S. Bhattacharya, S.K. Sitaraman, and R.R. Tummala, "Novel Board Material Technology for Next-Generation Microelectronic Packaging" in Developments in Dielectric Materials and Electronic Devices, Ceramic Transactions (K.M.Nair et al, Editors), Vol.167, 2004, pp. 371-382.
- Modi, M. and Sitaraman, S. K., "Single-Substrate Decohesion Test for Interfacial Fracture Toughness Measurement," EPTC 2003, 5th Electronics Packaging Technology Conference, Proceedings EPTC 2003, 5th Electronics Packaging Technology Conference, IEEE-CPMT and IMAPS, Dec. 10-12, 2003, Singapore, pp. 456-461.
- Classe, F. and Sitaraman, S. K., "Asymmetric Accelerated Thermal Cycles: An Alternative Approach to Accelerated Reliability Assessment of Microelectronic Packages," Proceedings EPTC 2003, 5th Electronics Packaging Technology Conference, IEEE-CPMT and IMAPS, Dec. 10-12, 2003, Singapore, pp. 81-89.
- Kim, W, Madhavan, R., Mao, J., Choi, J., Choi, S., Ravi, D., Sundaram, V., Sankararaman, S., Gupta, P., Zhang, Z., Lo, G., Swaminathan, M., Tummala, R. R., Sitaraman, S., Wong, C. P., Iyer, M. K., Rotaru, M., and Tay, A. A. O., "Electrical Design of Wafer Level Package on Board for Gigabit Data Transmission," Proceedings EPTC 2003, 5th Electronics Packaging Technology Conference, IEEE-CPMT and IMAPS, Dec. 10-12, 2003, Singapore, pp. 150-159.
- Perkins, A.and Sitaraman, S.K. "Thermo-Mechanical Failure Comparison and Evaluation of CCGA and CBGA Electronic Packages," 53rd Electronic Components and Technology Conference, IEEE-CPMT and EIA, New Orleans, LA, May 2003, pp. 422-430.
- Tunga, K., Pyland, J., Pucha, R. V., and Sitaraman, S.K. "Field-Use Conditions Vs. Thermal Cycles - A Physics-Based Mapping Study," 53rd Electronic Components and Technology Conference, IEEE-CPMT and EIA, New Orleans, LA, May 2003, pp. 182-188.
- Zhang, Z., Vorakunpinij, A., Sitaraman, S.K., and Wong, C. P., "Time Evolution of Temperature Distribution of a Flip-Chip No-Flow Underfill Package during Solder Reflow Process ," 53rd Electronic Components and Technology Conference, IEEE-CPMT and EIA, New Orleans, LA, May 2003, pp. 443-451.
- Ramakrishna, G., Liu , F., and Sitaraman, S.K. "Role of Substrate and Dielectric Materials on the Thermo mechanical Reliability of Microvias," 52nd Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, May 2002, pp. 439-445.
- Hegde, S., Pucha, R.V., and Sitaraman, S.K. "Selection of Optimal Materials and Geometry for Reliability of High Density Wiring (HDW) Substrates," 52nd Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, May 2002, pp. 446-451.
- Modi, M. and Sitaraman, S.K. "Effect of Adhesive Layer Properties on Interfacial Fracture in Thin Film High Density Interconnects," 52nd Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, May 2002, pp. 847-853.
- Zhu, Q., Ma, L. and Sitaraman, S.K. "Design and Optimization of a Novel Compliant Off-Chip Interconnect - One-Turn Helix," 52nd Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, May 2002, pp. 910-914.
- Hu, H. and Sitaraman, S.K. " Optimal Design of an Integrated Substrate Based On the Analysis of Warpage and Delamination," 52nd Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, May 2002, pp. 941-946.
- Ramakrishna, G., Pucha, R.V., and Sitaraman, S.K. " Micro-scale Plasticity Effects in Microvia Reliability Analysis," 52nd Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, May 2002, pp. 1304-1309.
- Ma, L., Qi, Z., Hantschel, T., Fork, D. K., and Sitaraman, S.K. "J-Springs - Innovative Compliant Interconnects for Next-Generation Packaging," 52nd Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, May 2002, pp. 1359-1365.
- Ahmad, J. and Sitaraman, S. K., "Modeling Methodologies to Study PWB Assembly Reliability," 52nd Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, May 2002, pp. 1658-1664.
- Zhu, Q., Ma, L., and Sitaraman, S. K. "Lithography-Based One-Turn Helix (OTH) Compliant Interconnects for Wafer Level Packaging," International Workshop On Wafer Level CSP and Flip Chip Packaging, Stone Mountain, GA, March 2002.
- Pyland, J., Pucha, R.V., and Sitaraman, S. K., "Effect of Underfill on BGA Reliability," 51st Electronic Components and Technology Conference, IEEE-CPMT and EIA, Orlando, FL, May 2001, pp. 85-90
- Ahmad, M. and Sitaraman, S. K., "Coupled Thermal Electric Modeling of Flexible Micro-Spring Interconnects for High Performance Probing," 51st Electronic Components and Technology Conference, IEEE-CPMT and EIA, Orlando, FL, May 2001, pp. 721-729.
- Xie, W., Hu, H., and Sitaraman, S. K., "Selection of Base Substrate Material for Design Against Interfacial Delamination for a Multilayered SOP Structure," 51st Electronic Components and Technology Conference, IEEE-CPMT and EIA, Orlando, FL, May 2001, pp. 613-619.
- Ma, L., Zhu, Q., Sitaraman, S. K., Chua, C., and Fork, D., "Compliant cantilevered spring interconnects for flip-chip packaging," 51st Electronic Components and Technology Conference, IEEE-CPMT and EIA, Orlando, FL, May 2001, pp. 761-766.
- Fork, D. K., Chua, C. L., Wong, L., Alimonda, A. S., Smith, D. L., Modi, M., Zhu, Q., Ma, L., and Sitaraman, S. K., "Stress-engineered metal interconnects", Proceeding of 2001 International Conference on High-Density Interconnect and System Packaging, Santa Clara, CA, USA, April, 2001.
- Ma, L., Zhu, Q., Sitaraman, S. K., Chua, C., and Fork D. K., "Novel Nanospring Interconnects for High-Density Applications," 7th International Symposium and Exhibition on Advanced Packaging Materials - Processes, Properties, and Interfaces, IMAPS-IEEE, Braselton, GA, March 2001, pp. 372-378.
- Sitaraman, S. K., Dunne, R. C., Raghunathan, R., and Xie, W., "Implantable Medical Devices and Next-Genertion Microsystems Packaging: An Integrated Process Modeling Approach to High Reliability and Miniaturization," NSF Design and Manufacturing Grantees Conference, Tampa, FL, Jan. 7-10, 2001.
- Chua, C. L., Fork, D. K., Smith, D. L., McIntyre, H., Ma, L., Zhu, Q., Modi, M. and Sitaraman, S. K., "High density packaging of vertical-cavity surface-emitting laser arrays using micro-machined spring arrays", Proceedings of IEEE Lasers and Electro-Optics Society (LEOS) 2000 Annual Meeting, Rio Grande, Puerto Rico, November 2000.
- Bhattacharya, S., Baldwin, D., Sitaraman, S., Qu, J., Wong, C. P., Ume, I. C., and Tummala, R. R., "Low Cost MCM: Large Area Packaging using Small Area Substrates, Part 2," High-Density Interconnect International, October 2000, pp. 36-39.
- Bhattacharya, S., Baldwin, D., Sitaraman, S., Qu, J., Wong, C. P., Ume, I. C., and Tummala, R. R., "Low Cost MCM: Large Area Packaging using Small Area Substrates, Part 1," High-Density Interconnect International, September, 2000, pp. 20-25.
- Schubert, A., Dudek, R., Leutenbauer, R., Coskina, P., Becker, K. -F., Kloeser, H., Reichl, D., Baldwin, D., Qu, J., Swaminathan, M., Wong, C. P., Tummala, R., and Sitaraman, S. K., "Numerical and Experimental Investigation of Large IC Flip Chip Attach," 50th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, May 2000, pp. 1338-1346.
- Haemer, J. M., Sitaraman, S. K., Fork, D. K., Smith, D., Mok, S., and Chong, F. C., "Flexible Micro-Spring Interconnects for High Performance Probing," 50th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, May 2000, pp. 1157-1163.
- Paydenkar, C. S., Baldwin, D. F., Sitaraman, S., Wong, C. P., and Lewis, B. J., "Chip Scale Polymer Stud Grid Array Packaging and Reliability Based on Low Cost Flip-Chip Processing," 50th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, May 2000, pp. 1449-1459.
- Hu, H., Xie, W., and Sitaraman , S. K., "Analytical Model to Study Interfacial Delamination Propagation in a Multi-Layered Electronic Packaging Structure under Thermal Loading," 50th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, May 2000, pp. 1526-1534.
- Dunne, R. C., Sitaraman, S. K., Luo, S., Wong, C. P., Estes, W. E., and Periyasamy, M., "Cure Kinetics Modeling of ViaLux 81: A Novel Epoxy Photo-Dielectric Film (PDDF) for Microvia Applications," 6th International Symposium and Exhibition on Advanced Packaging Materials - Processes, Properties, and Interfaces, IMAPS-IEEE, Braselton, GA, March 2000, pp. 254-260.
- Sitaraman, S. K., Dunne, R. C., Hanna, C. E., Michaelides, S., Raghunathan, R., and Xie, W., "An Integrated Process-Mechanics and Reliability Prediction Methodology for Implantable Medical Devices," NSF Design and Manufacturing Grantees Conference, Vancouver, BC, Canada, Jan. 4-6, 2000.
- Dunne, R. C., Sitaraman, S. K., Rao, Y., Luo, S., Wong, C. P., Estes, W. E., Gonzalez, C. G., Murray, E. B., Overcash, T. R., Anderson, R. E., Coburn, J. C., and Periyasamy, M., "Cure Optimization and Process Guidelines for a Novel Epoxy Photo-Dielectric Dry Film for Microvia Applications," 8th Electronic Circuits World Convention, Tokyo, September 1999.
- Hanna, C., Michaelides, S., Palaniappan, P., Baldwin, D., and Sitaraman, S. K., "Numerical and Experimental Study of the Evolution of Stresses in Flip-Chip Assemblies during Assembly and Thermal Cycling," 49th Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, June 1999, pp. 1001-1009.
- Variyam, M. and Sitaraman, S. K., "Palletized Approach to Large-Area Thin-Film Processing - Materials, Models, and Measurement," 49th Electronic Components and Technology Conference, IEEE-CPMT and EIA, San Diego, CA, June 1999, pp. 686-693.
- Manjula, S., Sundararaman, V., Sitaraman, S. K., Wong, C. P., Wu, J., and Pike, R. T., "Multi-Layered Structure: Adhesive Selection and Process Mechanics," 5th International Symposium and Exhibition on Advanced Packaging Materials - Processes, Properties, and Interfaces, IMAPS-IEEE, Braselton, GA, March 1999, pp. 48-52.
- Sitaraman, S. K., "Implantable Medical Devices: A Process-Modeling Approach to High Reliability and Miniaturization," NSF Design and Manufacturing Grantees Conference, Long Beach, CA, Jan. 5-8, 1999.
- Dunne, R. C. and Sitaraman, S. K., "Process Modeling of Sequential Build-Up of Multilayered Structures," 48th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Seattle, WA, May 1998, pp. 353-361.
- Sitaraman, S. K., Sundararaman, V., Manjula, S., Wong, C. P., Lu, D., Pike, R. T., Meyers, L., "Use of Highly Compliant Adhesives in the Large Area Processing of MCM-D Substrates," 48th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Seattle, WA, May 1998, pp. 895-899.
- Pang, H. L. J., Tan, T., and Sitaraman, S. K. "Thermo-Mechanical Analysis of Solder Joint Fatigue and Creep in a Flip Chip on Board Package Subjected to Temperature Cycling Loading," 48th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Seattle, WA, May 1998, pp. 878-883.
- Dunne, R. C. and Sitaraman, S. K., "Sequential Process Modeling of SLIM Substrate Fabrication," 4th International Symposium and Exhibition on Advanced Packaging Materials - Processes, Properties, and Interfaces, IMAPS-IEEE, Braselton, GA, March 1998, pp. 175-182.
- Pang, H. L. J., Sitaraman, S. K., Zwemer, D. A., and Hassell, P., "Thermally-Induced Warpage and Stresses in Flip-Chip on Board (FCOB) Assembly", 2nd International Advanced Technology Workshop on Flip Chip Technology, IMAPS-IEEE, March 14-16, 1998, Braselton, GA.
- Ramani, K. and Sitaraman, S. K., "Dissimilar Material Systems: Manufacturing Processes, Design, and Mechanics," MD-Vol. 80, Composites and Functionally Graded Materials, ASME 1997, p. 277.
- Tummala, R., Swaminathan, M., and Sitaraman, S. K., Next-Generation Package Design, IMAPS Advanced Technology Workshop, June 1997.
- Murphy, R. S. and Sitaraman, S. K., "Two and Three-Dimensional Modeling of VSPA Butt Solder Joints", 47th Electronic Components and Technology Conference, IEEE and EIA, San Jose, CA, May 18-21, 1997, pp. 472-478.
- Dunne, R. C. and Sitaraman, S. K., "The Effect of Substrate Materials on the Thermal Mechanical Behavior of Multilayer Structures, 3rd International Symposium and Exhibition on Advanced Packaging Materials - Processes, Properties, and Interfaces, IMAPS-IEEE, Braselton, GA, March 9-12, 1997, pp. 134-137.
- Dunne, R. C. and Sitaraman, S. K.,"Thermo-Mechanical Reliability of a 'Sandwich' Substrate with Integrated Passives", VIII International Congress on Experimental Mechanics and Experimental/Numerical Mechanics in Electronics Packaging, Nashville, TN, June 10-13, 1996, pp. 19-20.
- Michaelides, S., and Sitaraman, S. K.,"Micro-Macro-Micro Modeling in Electronic Packaging," Experimental/Numerical Mechanics in Electronic Packaging, VIII International Congress on Experimental Mechanics, June 10-13, 1996, Nashville, TN, pp. 44-45.
- Dunne, R. C. and Sitaraman, S. K., "Thermo-Mechanical Modeling of a Novel MCM-DL Technology," 46th Electronic Components and Technology Conference, IEEE and EIA, Orlando, Florida, May 1996, pp. 815-820.
- Michaelides, S., and Sitaraman, S. K. ,"Thermo-Mechanical Design of Flip-Chip for Harsh Environments," ISHM International Conference and Exhibition on Multichip Modules, April 17-19, 1996, Denver, CO, pp. 155-160.