“Low-K Dielectric Compatible Wafer-Level Compliant Chip-to-Substrate Interconnects

Citation: 
Kacker, K., Lo, G., Sitaraman, S.K., “Low-K Dielectric Compatible Wafer-Level Compliant Chip-to-Substrate Interconnects,” IEEE Transactions on Advanced Packaging, Vol. 31, No. 1, 2008, pp. 22-32.