Impact Isolation Through the Use of Compliant Interconnects for Microelectronic Packages

Chen, W., Bhat, A., and Sitaraman, S. K., “Impact Isolation Through the Use of Compliant Interconnects for Microelectronic Packages,” Transactions of the ASME – Journal of Electronic Packaging, December 2015, Vol. 137, pp. 0410051- 0410058.
First-level and second-level compliant interconnect structures are being pursued in universities and industries to accommodate the differential displacement induced by the coefficient of thermal expansion mismatch between the die and the substrate or between the substrate and the board. The compliant interconnects mechanically decouple the die from the substrate or the substrate from the board, and thus reduce the thermally induced stresses in the assembly. This paper presents drop-test experimental and simulation data for scaled-up prototype of compliant interconnects. The simulations were based on Input-G method and performed using ANSYS® finite element software for varying drop heights. In parallel to the simulations, scaled-up compliant polymer interconnects sandwiched between a polymer die and a polymer substrate were fabricated using three-dimensional (3D) printing, and this fabrication provides a quick low-cost alternative to cleanroom fabrication. The prototype of the assembly was subjected to drop tests from varying drop heights. The response of the assembly during drop testing was captured using strain gauges and an accelerometer mounted on the prototype. The data from the experiments were compared with the predictions from the simulations. Based on such simulations, significant insight into the behavior of compliant interconnects under impact loading was obtained, which could be used for reliable design of compliant interconnect under impact loading. Both the experimental and simulation data reveal that the compliant interconnects are able to reduce the strains that transfer from substrate to die by one-order.
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