Effect of Wafer Level Packaging, Silicon Substrate and Board Material on Gigabit Board-Silicon-Board Data Transmission

Citation: 
Kim, W., Madhavan, R., Mao, J., Choi, J., Choi, S., Ravi, D., Sundaram, V., Sankararaman, S. , Gupta, P., Zhang, Z., Lo, G., Swaminathan, M., Tummala, R., Sitaraman, S.K., Wong, C.P., Lyer, G., Rotaru, G., and Tay, A., "Effect of Wafer Level Packaging, Silicon Substrate and Board Material on Gigabit Board-Silicon-Board Data Transmission," 54th Electronic Components and Technology Conference, IEEE-CPMT and EIA, Las Vegas, NV, June 2004, pp. 1506-1512